Digital Twins Emerging in Semiconductor Industry

Digital twins are gaining serious traction in the white-hot semiconductor industry.

The global chip industry is increasingly leaning on advanced technologies as it pushes toward a $1 trillion USD valuation by 2030.

In Semiconductor Engineering, Laura Peters reports that digital twinning is emerging as a crucial tool for chipmakers seeking to drive innovation and efficiency without impacting actual production.

The digital twin concept emerged in the early 2000s and gained traction in the 2010s, mostly for complex system applications in the aerospace, defense and automotive industries.

Creating virtual representations of complex semiconductor designs presents unique challenges. Still the high-level abstraction and comprehensive mapping needed to unlock efficiency in chipmaking is becoming accessible.

In an interview with Semiconductor Engineering, Sameer Kher, the senior director of product development for systems and digital twins at Ansys, said: “Digital twins have to happen because of the limits of what can be done in terms of gaining efficiencies going forward.”

Digital twins are virtual replicas of real-world entities that reflect their physical counterparts in real time. The simulation and modeling capabilities enable manufacturers to predict and fix issues before they cause disruptions and experiment without requiring physical prototypes.

Electronic design automation software companies have anticipated the need for digital twin integrations.

Three major EDA companies – Cadence Design Systems, Synopsys, and Ansys – used GTC 2024 as a chance to tout their collaborations with NVIDIA in the digital twin realm.
Cadence, with its digital twin platform, extends its comprehensive EDA capabilities beyond traditional chip and fab design to include system simulation and analysis.

ANSYS offers comprehensive simulation capabilities through its Ansys Twin Builder, which is touted for the ability to create simulation-based digital twins at scale. ANSYS and NVIDIA are building on their partnership to develop next-generation simulation technology with generative AI.

Accelerated computer processing and 6G communication are expected to play key roles in bringing integrations to maturity.

In Semiconductor Engineering, Peters notes that system complexity, resistance to change, and the emerging nature of digital twinning as challenges that limit its adoption in chipmaking. It remains to be seen how long widescale digital twin adoption in semiconductor manufacturing will take, but the significant funding shows how serious the industry takes the technology.